Commit 850759c4 authored by mtufan's avatar mtufan

puae 2.3.2

parent 45efada1
This source diff could not be displayed because it is too large. You can view the blob instead.
...@@ -3616,7 +3616,7 @@ static void BPLCON0 (int hpos, uae_u16 v) ...@@ -3616,7 +3616,7 @@ static void BPLCON0 (int hpos, uae_u16 v)
if (! (currprefs.chipset_mask & CSMASK_ECS_DENISE)) if (! (currprefs.chipset_mask & CSMASK_ECS_DENISE))
v &= ~0x00F1; v &= ~0x00F1;
else if (! (currprefs.chipset_mask & CSMASK_AGA)) else if (! (currprefs.chipset_mask & CSMASK_AGA))
v &= ~0x00B1; v &= ~0x00B0;
v &= ~(0x0200 | 0x0100 | 0x0080 | 0x0020); v &= ~(0x0200 | 0x0100 | 0x0080 | 0x0020);
#if SPRBORDER #if SPRBORDER
......
...@@ -1197,7 +1197,8 @@ static uae_u32 gayle2_read (uaecptr addr) ...@@ -1197,7 +1197,8 @@ static uae_u32 gayle2_read (uaecptr addr)
addr &= 0xffff; addr &= 0xffff;
if (addr == 0x1000) { if (addr == 0x1000) {
/* Gayle ID */ /* Gayle ID */
if (gayle_id_cnt == 0 || gayle_id_cnt == 1 || gayle_id_cnt == 3 || ((currprefs.chipset_mask & CSMASK_AGA) && gayle_id_cnt == 7)) if (gayle_id_cnt == 0 || gayle_id_cnt == 1 || gayle_id_cnt == 3 || ((currprefs.chipset_mask & CSMASK_AGA) && gayle_id_cnt == 7) ||
(currprefs.cs_cd32cd && !currprefs.cs_ide && !currprefs.cs_pcmcia && gayle_id_cnt == 2))
v = 0x80; v = 0x80;
else else
v = 0x00; v = 0x00;
......
...@@ -119,23 +119,23 @@ const struct customData custd[] = ...@@ -119,23 +119,23 @@ const struct customData custd[] =
#if 0 #if 0
{ "BLTDDAT", 0xdff000 }, /* Blitter dest. early read (dummy address) */ { "BLTDDAT", 0xdff000 }, /* Blitter dest. early read (dummy address) */
#endif #endif
{ "DMACONR", 0xdff002, 1, 0 }, /* Dma control (and blitter status) read */ { "DMACONR", 0xdff002, 1 }, /* Dma control (and blitter status) read */
{ "VPOSR", 0xdff004, 1, 0 }, /* Read vert most sig. bits (and frame flop */ { "VPOSR", 0xdff004, 1 }, /* Read vert most sig. bits (and frame flop */
{ "VHPOSR", 0xdff006, 1, 0 }, /* Read vert and horiz position of beam */ { "VHPOSR", 0xdff006, 1 }, /* Read vert and horiz position of beam */
#if 0 #if 0
{ "DSKDATR", 0xdff008 }, /* Disk data early read (dummy address) */ { "DSKDATR", 0xdff008 }, /* Disk data early read (dummy address) */
#endif #endif
{ "JOY0DAT", 0xdff00A, 1, 0 }, /* Joystick-mouse 0 data (vert,horiz) */ { "JOY0DAT", 0xdff00A, 1 }, /* Joystick-mouse 0 data (vert,horiz) */
{ "JOT1DAT", 0xdff00C, 1, 0 }, /* Joystick-mouse 1 data (vert,horiz) */ { "JOT1DAT", 0xdff00C, 1 }, /* Joystick-mouse 1 data (vert,horiz) */
{ "CLXDAT", 0xdff00E, 1, 0 }, /* Collision data reg. (read and clear) */ { "CLXDAT", 0xdff00E, 1 }, /* Collision data reg. (read and clear) */
{ "ADKCONR", 0xdff010, 1, 0 }, /* Audio,disk control register read */ { "ADKCONR", 0xdff010, 1 }, /* Audio,disk control register read */
{ "POT0DAT", 0xdff012, 1, 0 }, /* Pot counter pair 0 data (vert,horiz) */ { "POT0DAT", 0xdff012, 1 }, /* Pot counter pair 0 data (vert,horiz) */
{ "POT1DAT", 0xdff014, 1, 0 }, /* Pot counter pair 1 data (vert,horiz) */ { "POT1DAT", 0xdff014, 1 }, /* Pot counter pair 1 data (vert,horiz) */
{ "POTGOR", 0xdff016, 1, 0 }, /* Pot pin data read */ { "POTGOR", 0xdff016, 1 }, /* Pot pin data read */
{ "SERDATR", 0xdff018, 1, 0 }, /* Serial port data and status read */ { "SERDATR", 0xdff018, 1 }, /* Serial port data and status read */
{ "DSKBYTR", 0xdff01A, 1, 0 }, /* Disk data byte and status read */ { "DSKBYTR", 0xdff01A, 1 }, /* Disk data byte and status read */
{ "INTENAR", 0xdff01C, 1, 0 }, /* Interrupt enable bits read */ { "INTENAR", 0xdff01C, 1 }, /* Interrupt enable bits read */
{ "INTREQR", 0xdff01E, 1, 0 }, /* Interrupt request bits read */ { "INTREQR", 0xdff01E, 1 }, /* Interrupt request bits read */
{ "DSKPTH", 0xdff020, 2, 1 }, /* Disk pointer (high 5 bits) */ { "DSKPTH", 0xdff020, 2, 1 }, /* Disk pointer (high 5 bits) */
{ "DSKPTL", 0xdff022, 2, 2 }, /* Disk pointer (low 15 bits) */ { "DSKPTL", 0xdff022, 2, 2 }, /* Disk pointer (low 15 bits) */
{ "DSKLEN", 0xdff024, 2, 0 }, /* Disk lentgh */ { "DSKLEN", 0xdff024, 2, 0 }, /* Disk lentgh */
...@@ -189,61 +189,61 @@ const struct customData custd[] = ...@@ -189,61 +189,61 @@ const struct customData custd[] =
{ "BPLHDAT", 0xdff07A }, /* Ext logic UHRES bit plane identifier */ { "BPLHDAT", 0xdff07A }, /* Ext logic UHRES bit plane identifier */
#endif #endif
{ "LISAID", 0xdff07C, 1, 8 }, /* Chip revision level for Denise/Lisa */ { "LISAID", 0xdff07C, 1, 8 }, /* Chip revision level for Denise/Lisa */
{ "DSKSYNC", 0xdff07E, 2, 0 }, /* Disk sync pattern reg for disk read */ { "DSKSYNC", 0xdff07E, 2 }, /* Disk sync pattern reg for disk read */
{ "COP1LCH", 0xdff080, 2, 1 }, /* Coprocessor first location reg (high 5 bits) */ { "COP1LCH", 0xdff080, 2, 1 }, /* Coprocessor first location reg (high 5 bits) */
{ "COP1LCL", 0xdff082, 2, 2 }, /* Coprocessor first location reg (low 15 bits) */ { "COP1LCL", 0xdff082, 2, 2 }, /* Coprocessor first location reg (low 15 bits) */
{ "COP2LCH", 0xdff084, 2, 1 }, /* Coprocessor second reg (high 5 bits) */ { "COP2LCH", 0xdff084, 2, 1 }, /* Coprocessor second reg (high 5 bits) */
{ "COP2LCL", 0xdff086, 2, 2 }, /* Coprocessor second reg (low 15 bits) */ { "COP2LCL", 0xdff086, 2, 2 }, /* Coprocessor second reg (low 15 bits) */
{ "COPJMP1", 0xdff088, 2, 0 }, /* Coprocessor restart at first location */ { "COPJMP1", 0xdff088, 2 }, /* Coprocessor restart at first location */
{ "COPJMP2", 0xdff08A, 2, 0 }, /* Coprocessor restart at second location */ { "COPJMP2", 0xdff08A, 2 }, /* Coprocessor restart at second location */
#if 0 #if 0
{ "COPINS", 0xdff08C }, /* Coprocessor inst fetch identify */ { "COPINS", 0xdff08C }, /* Coprocessor inst fetch identify */
#endif #endif
{ "DIWSTRT", 0xdff08E, 2, 0 }, /* Display window start (upper left vert-hor pos) */ { "DIWSTRT", 0xdff08E, 2 }, /* Display window start (upper left vert-hor pos) */
{ "DIWSTOP", 0xdff090, 2, 0 }, /* Display window stop (lower right vert-hor pos) */ { "DIWSTOP", 0xdff090, 2 }, /* Display window stop (lower right vert-hor pos) */
{ "DDFSTRT", 0xdff092, 2, 0 }, /* Display bit plane data fetch start.hor pos */ { "DDFSTRT", 0xdff092, 2 }, /* Display bit plane data fetch start.hor pos */
{ "DDFSTOP", 0xdff094, 2, 0 }, /* Display bit plane data fetch stop.hor pos */ { "DDFSTOP", 0xdff094, 2 }, /* Display bit plane data fetch stop.hor pos */
{ "DMACON", 0xdff096, 2, 0 }, /* DMA control write (clear or set) */ { "DMACON", 0xdff096, 2 }, /* DMA control write (clear or set) */
{ "CLXCON", 0xdff098, 2, 0 }, /* Collision control */ { "CLXCON", 0xdff098, 2 }, /* Collision control */
{ "INTENA", 0xdff09A, 2, 0 }, /* Interrupt enable bits (clear or set bits) */ { "INTENA", 0xdff09A, 2 }, /* Interrupt enable bits (clear or set bits) */
{ "INTREQ", 0xdff09C, 2, 0 }, /* Interrupt request bits (clear or set bits) */ { "INTREQ", 0xdff09C, 2 }, /* Interrupt request bits (clear or set bits) */
{ "ADKCON", 0xdff09E, 2, 0 }, /* Audio,disk,UART,control */ { "ADKCON", 0xdff09E, 2 }, /* Audio,disk,UART,control */
{ "AUD0LCH", 0xdff0A0, 2, 1 }, /* Audio channel 0 location (high 5 bits) */ { "AUD0LCH", 0xdff0A0, 2, 1 }, /* Audio channel 0 location (high 5 bits) */
{ "AUD0LCL", 0xdff0A2, 2, 2 }, /* Audio channel 0 location (low 15 bits) */ { "AUD0LCL", 0xdff0A2, 2, 2 }, /* Audio channel 0 location (low 15 bits) */
{ "AUD0LEN", 0xdff0A4, 2, 0 }, /* Audio channel 0 lentgh */ { "AUD0LEN", 0xdff0A4, 2 }, /* Audio channel 0 lentgh */
{ "AUD0PER", 0xdff0A6, 2, 0 }, /* Audio channel 0 period */ { "AUD0PER", 0xdff0A6, 2 }, /* Audio channel 0 period */
{ "AUD0VOL", 0xdff0A8, 2, 0 }, /* Audio channel 0 volume */ { "AUD0VOL", 0xdff0A8, 2 }, /* Audio channel 0 volume */
{ "AUD0DAT", 0xdff0AA, 2, 0 }, /* Audio channel 0 data */ { "AUD0DAT", 0xdff0AA, 2 }, /* Audio channel 0 data */
#if 0 #if 0
{ "Unknown", 0xdff0AC }, /* Unknown or Unused */ { "Unknown", 0xdff0AC }, /* Unknown or Unused */
{ "Unknown", 0xdff0AE }, /* Unknown or Unused */ { "Unknown", 0xdff0AE }, /* Unknown or Unused */
#endif #endif
{ "AUD1LCH", 0xdff0B0, 2, 1 }, /* Audio channel 1 location (high 5 bits) */ { "AUD1LCH", 0xdff0B0, 2, 1 }, /* Audio channel 1 location (high 5 bits) */
{ "AUD1LCL", 0xdff0B2, 2, 2 }, /* Audio channel 1 location (low 15 bits) */ { "AUD1LCL", 0xdff0B2, 2, 2 }, /* Audio channel 1 location (low 15 bits) */
{ "AUD1LEN", 0xdff0B4, 2, 0 }, /* Audio channel 1 lentgh */ { "AUD1LEN", 0xdff0B4, 2 }, /* Audio channel 1 lentgh */
{ "AUD1PER", 0xdff0B6, 2, 0 }, /* Audio channel 1 period */ { "AUD1PER", 0xdff0B6, 2 }, /* Audio channel 1 period */
{ "AUD1VOL", 0xdff0B8, 2, 0 }, /* Audio channel 1 volume */ { "AUD1VOL", 0xdff0B8, 2 }, /* Audio channel 1 volume */
{ "AUD1DAT", 0xdff0BA, 2, 0 }, /* Audio channel 1 data */ { "AUD1DAT", 0xdff0BA, 2 }, /* Audio channel 1 data */
#if 0 #if 0
{ "Unknown", 0xdff0BC }, /* Unknown or Unused */ { "Unknown", 0xdff0BC }, /* Unknown or Unused */
{ "Unknown", 0xdff0BE }, /* Unknown or Unused */ { "Unknown", 0xdff0BE }, /* Unknown or Unused */
#endif #endif
{ "AUD2LCH", 0xdff0C0, 2, 1 }, /* Audio channel 2 location (high 5 bits) */ { "AUD2LCH", 0xdff0C0, 2, 1 }, /* Audio channel 2 location (high 5 bits) */
{ "AUD2LCL", 0xdff0C2, 2, 2 }, /* Audio channel 2 location (low 15 bits) */ { "AUD2LCL", 0xdff0C2, 2, 2 }, /* Audio channel 2 location (low 15 bits) */
{ "AUD2LEN", 0xdff0C4, 2, 0 }, /* Audio channel 2 lentgh */ { "AUD2LEN", 0xdff0C4, 2 }, /* Audio channel 2 lentgh */
{ "AUD2PER", 0xdff0C6, 2, 0 }, /* Audio channel 2 period */ { "AUD2PER", 0xdff0C6, 2 }, /* Audio channel 2 period */
{ "AUD2VOL", 0xdff0C8, 2, 0 }, /* Audio channel 2 volume */ { "AUD2VOL", 0xdff0C8, 2 }, /* Audio channel 2 volume */
{ "AUD2DAT", 0xdff0CA, 2, 0 }, /* Audio channel 2 data */ { "AUD2DAT", 0xdff0CA, 2 }, /* Audio channel 2 data */
#if 0 #if 0
{ "Unknown", 0xdff0CC }, /* Unknown or Unused */ { "Unknown", 0xdff0CC }, /* Unknown or Unused */
{ "Unknown", 0xdff0CE }, /* Unknown or Unused */ { "Unknown", 0xdff0CE }, /* Unknown or Unused */
#endif #endif
{ "AUD3LCH", 0xdff0D0, 2, 1 }, /* Audio channel 3 location (high 5 bits) */ { "AUD3LCH", 0xdff0D0, 2, 1 }, /* Audio channel 3 location (high 5 bits) */
{ "AUD3LCL", 0xdff0D2, 2, 2 }, /* Audio channel 3 location (low 15 bits) */ { "AUD3LCL", 0xdff0D2, 2, 2 }, /* Audio channel 3 location (low 15 bits) */
{ "AUD3LEN", 0xdff0D4, 2, 0 }, /* Audio channel 3 lentgh */ { "AUD3LEN", 0xdff0D4, 2 }, /* Audio channel 3 lentgh */
{ "AUD3PER", 0xdff0D6, 2, 0 }, /* Audio channel 3 period */ { "AUD3PER", 0xdff0D6, 2 }, /* Audio channel 3 period */
{ "AUD3VOL", 0xdff0D8, 2, 0 }, /* Audio channel 3 volume */ { "AUD3VOL", 0xdff0D8, 2 }, /* Audio channel 3 volume */
{ "AUD3DAT", 0xdff0DA, 2, 0 }, /* Audio channel 3 data */ { "AUD3DAT", 0xdff0DA, 2 }, /* Audio channel 3 data */
#if 0 #if 0
{ "Unknown", 0xdff0DC }, /* Unknown or Unused */ { "Unknown", 0xdff0DC }, /* Unknown or Unused */
{ "Unknown", 0xdff0DE }, /* Unknown or Unused */ { "Unknown", 0xdff0DE }, /* Unknown or Unused */
...@@ -264,22 +264,22 @@ const struct customData custd[] = ...@@ -264,22 +264,22 @@ const struct customData custd[] =
{ "BPL7PTL", 0xdff0FA, 2, 2|8 }, /* Bit plane pointer 7 (low 15 bits) */ { "BPL7PTL", 0xdff0FA, 2, 2|8 }, /* Bit plane pointer 7 (low 15 bits) */
{ "BPL8PTH", 0xdff0FC, 2, 1|8 }, /* Bit plane pointer 8 (high 5 bits) */ { "BPL8PTH", 0xdff0FC, 2, 1|8 }, /* Bit plane pointer 8 (high 5 bits) */
{ "BPL8PTL", 0xdff0FE, 2, 2|8 }, /* Bit plane pointer 8 (low 15 bits) */ { "BPL8PTL", 0xdff0FE, 2, 2|8 }, /* Bit plane pointer 8 (low 15 bits) */
{ "BPLCON0", 0xdff100, 2, 0 }, /* Bit plane control reg (misc control bits) */ { "BPLCON0", 0xdff100, 2 }, /* Bit plane control reg (misc control bits) */
{ "BPLCON1", 0xdff102, 2, 0 }, /* Bit plane control reg (scroll val PF1,PF2) */ { "BPLCON1", 0xdff102, 2 }, /* Bit plane control reg (scroll val PF1,PF2) */
{ "BPLCON2", 0xdff104, 2, 0 }, /* Bit plane control reg (priority control) */ { "BPLCON2", 0xdff104, 2 }, /* Bit plane control reg (priority control) */
{ "BPLCON3", 0xdff106, 2, 8 }, /* Bit plane control reg (enhanced features) */ { "BPLCON3", 0xdff106, 2|8 }, /* Bit plane control reg (enhanced features) */
{ "BPL1MOD", 0xdff108, 2, 0 }, /* Bit plane modulo (odd planes,or active- fetch lines if bitplane scan-doubling is enabled */ { "BPL1MOD", 0xdff108, 2 }, /* Bit plane modulo (odd planes,or active- fetch lines if bitplane scan-doubling is enabled */
{ "BPL2MOD", 0xdff10A, 2, 0 }, /* Bit plane modulo (even planes or inactive- fetch lines if bitplane scan-doubling is enabled */ { "BPL2MOD", 0xdff10A, 2 }, /* Bit plane modulo (even planes or inactive- fetch lines if bitplane scan-doubling is enabled */
{ "BPLCON4", 0xdff10C, 2, 8 }, /* Bit plane control reg (bitplane and sprite masks) */ { "BPLCON4", 0xdff10C, 2|8 }, /* Bit plane control reg (bitplane and sprite masks) */
{ "CLXCON2", 0xdff10e, 2, 8 }, /* Extended collision control reg */ { "CLXCON2", 0xdff10e, 2|8 }, /* Extended collision control reg */
{ "BPL1DAT", 0xdff110, 2, 0 }, /* Bit plane 1 data (parallel to serial con- vert) */ { "BPL1DAT", 0xdff110, 2 }, /* Bit plane 1 data (parallel to serial con- vert) */
{ "BPL2DAT", 0xdff112, 2, 0 }, /* Bit plane 2 data (parallel to serial con- vert) */ { "BPL2DAT", 0xdff112, 2 }, /* Bit plane 2 data (parallel to serial con- vert) */
{ "BPL3DAT", 0xdff114, 2, 0 }, /* Bit plane 3 data (parallel to serial con- vert) */ { "BPL3DAT", 0xdff114, 2 }, /* Bit plane 3 data (parallel to serial con- vert) */
{ "BPL4DAT", 0xdff116, 2, 0 }, /* Bit plane 4 data (parallel to serial con- vert) */ { "BPL4DAT", 0xdff116, 2 }, /* Bit plane 4 data (parallel to serial con- vert) */
{ "BPL5DAT", 0xdff118, 2, 0 }, /* Bit plane 5 data (parallel to serial con- vert) */ { "BPL5DAT", 0xdff118, 2 }, /* Bit plane 5 data (parallel to serial con- vert) */
{ "BPL6DAT", 0xdff11a, 2, 0 }, /* Bit plane 6 data (parallel to serial con- vert) */ { "BPL6DAT", 0xdff11a, 2 }, /* Bit plane 6 data (parallel to serial con- vert) */
{ "BPL7DAT", 0xdff11c, 2, 8 }, /* Bit plane 7 data (parallel to serial con- vert) */ { "BPL7DAT", 0xdff11c, 2|8 }, /* Bit plane 7 data (parallel to serial con- vert) */
{ "BPL8DAT", 0xdff11e, 2, 8 }, /* Bit plane 8 data (parallel to serial con- vert) */ { "BPL8DAT", 0xdff11e, 2|8 }, /* Bit plane 8 data (parallel to serial con- vert) */
{ "SPR0PTH", 0xdff120, 2, 1 }, /* Sprite 0 pointer (high 5 bits) */ { "SPR0PTH", 0xdff120, 2, 1 }, /* Sprite 0 pointer (high 5 bits) */
{ "SPR0PTL", 0xdff122, 2, 2 }, /* Sprite 0 pointer (low 15 bits) */ { "SPR0PTL", 0xdff122, 2, 2 }, /* Sprite 0 pointer (low 15 bits) */
{ "SPR1PTH", 0xdff124, 2, 1 }, /* Sprite 1 pointer (high 5 bits) */ { "SPR1PTH", 0xdff124, 2, 1 }, /* Sprite 1 pointer (high 5 bits) */
...@@ -296,78 +296,78 @@ const struct customData custd[] = ...@@ -296,78 +296,78 @@ const struct customData custd[] =
{ "SPR6PTL", 0xdff13A, 2, 2 }, /* Sprite 6 pointer (low 15 bits) */ { "SPR6PTL", 0xdff13A, 2, 2 }, /* Sprite 6 pointer (low 15 bits) */
{ "SPR7PTH", 0xdff13C, 2, 1 }, /* Sprite 7 pointer (high 5 bits) */ { "SPR7PTH", 0xdff13C, 2, 1 }, /* Sprite 7 pointer (high 5 bits) */
{ "SPR7PTL", 0xdff13E, 2, 2 }, /* Sprite 7 pointer (low 15 bits) */ { "SPR7PTL", 0xdff13E, 2, 2 }, /* Sprite 7 pointer (low 15 bits) */
{ "SPR0POS", 0xdff140, 2, 0 }, /* Sprite 0 vert-horiz start pos data */ { "SPR0POS", 0xdff140, 2 }, /* Sprite 0 vert-horiz start pos data */
{ "SPR0CTL", 0xdff142, 2, 0 }, /* Sprite 0 position and control data */ { "SPR0CTL", 0xdff142, 2 }, /* Sprite 0 position and control data */
{ "SPR0DATA", 0xdff144, 2, 0 }, /* Sprite 0 image data register A */ { "SPR0DATA", 0xdff144, 2 }, /* Sprite 0 image data register A */
{ "SPR0DATB", 0xdff146, 2, 0 }, /* Sprite 0 image data register B */ { "SPR0DATB", 0xdff146, 2 }, /* Sprite 0 image data register B */
{ "SPR1POS", 0xdff148, 2, 0 }, /* Sprite 1 vert-horiz start pos data */ { "SPR1POS", 0xdff148, 2 }, /* Sprite 1 vert-horiz start pos data */
{ "SPR1CTL", 0xdff14A, 2, 0 }, /* Sprite 1 position and control data */ { "SPR1CTL", 0xdff14A, 2 }, /* Sprite 1 position and control data */
{ "SPR1DATA", 0xdff14C, 2, 0 }, /* Sprite 1 image data register A */ { "SPR1DATA", 0xdff14C, 2 }, /* Sprite 1 image data register A */
{ "SPR1DATB", 0xdff14E, 2, 0 }, /* Sprite 1 image data register B */ { "SPR1DATB", 0xdff14E, 2 }, /* Sprite 1 image data register B */
{ "SPR2POS", 0xdff150, 2, 0 }, /* Sprite 2 vert-horiz start pos data */ { "SPR2POS", 0xdff150, 2 }, /* Sprite 2 vert-horiz start pos data */
{ "SPR2CTL", 0xdff152, 2, 0 }, /* Sprite 2 position and control data */ { "SPR2CTL", 0xdff152, 2 }, /* Sprite 2 position and control data */
{ "SPR2DATA", 0xdff154, 2, 0 }, /* Sprite 2 image data register A */ { "SPR2DATA", 0xdff154, 2 }, /* Sprite 2 image data register A */
{ "SPR2DATB", 0xdff156, 2, 0 }, /* Sprite 2 image data register B */ { "SPR2DATB", 0xdff156, 2 }, /* Sprite 2 image data register B */
{ "SPR3POS", 0xdff158, 2, 0 }, /* Sprite 3 vert-horiz start pos data */ { "SPR3POS", 0xdff158, 2 }, /* Sprite 3 vert-horiz start pos data */
{ "SPR3CTL", 0xdff15A, 2, 0 }, /* Sprite 3 position and control data */ { "SPR3CTL", 0xdff15A, 2 }, /* Sprite 3 position and control data */
{ "SPR3DATA", 0xdff15C, 2, 0 }, /* Sprite 3 image data register A */ { "SPR3DATA", 0xdff15C, 2 }, /* Sprite 3 image data register A */
{ "SPR3DATB", 0xdff15E, 2, 0 }, /* Sprite 3 image data register B */ { "SPR3DATB", 0xdff15E, 2 }, /* Sprite 3 image data register B */
{ "SPR4POS", 0xdff160, 2, 0 }, /* Sprite 4 vert-horiz start pos data */ { "SPR4POS", 0xdff160, 2 }, /* Sprite 4 vert-horiz start pos data */
{ "SPR4CTL", 0xdff162, 2, 0 }, /* Sprite 4 position and control data */ { "SPR4CTL", 0xdff162, 2 }, /* Sprite 4 position and control data */
{ "SPR4DATA", 0xdff164, 2, 0 }, /* Sprite 4 image data register A */ { "SPR4DATA", 0xdff164, 2 }, /* Sprite 4 image data register A */
{ "SPR4DATB", 0xdff166, 2, 0 }, /* Sprite 4 image data register B */ { "SPR4DATB", 0xdff166, 2 }, /* Sprite 4 image data register B */
{ "SPR5POS", 0xdff168, 2, 0 }, /* Sprite 5 vert-horiz start pos data */ { "SPR5POS", 0xdff168, 2 }, /* Sprite 5 vert-horiz start pos data */
{ "SPR5CTL", 0xdff16A, 2, 0 }, /* Sprite 5 position and control data */ { "SPR5CTL", 0xdff16A, 2 }, /* Sprite 5 position and control data */
{ "SPR5DATA", 0xdff16C, 2, 0 }, /* Sprite 5 image data register A */ { "SPR5DATA", 0xdff16C, 2 }, /* Sprite 5 image data register A */
{ "SPR5DATB", 0xdff16E, 2, 0 }, /* Sprite 5 image data register B */ { "SPR5DATB", 0xdff16E, 2 }, /* Sprite 5 image data register B */
{ "SPR6POS", 0xdff170, 2, 0 }, /* Sprite 6 vert-horiz start pos data */ { "SPR6POS", 0xdff170, 2 }, /* Sprite 6 vert-horiz start pos data */
{ "SPR6CTL", 0xdff172, 2, 0 }, /* Sprite 6 position and control data */ { "SPR6CTL", 0xdff172, 2 }, /* Sprite 6 position and control data */
{ "SPR6DATA", 0xdff174, 2, 0 }, /* Sprite 6 image data register A */ { "SPR6DATA", 0xdff174, 2 }, /* Sprite 6 image data register A */
{ "SPR6DATB", 0xdff176, 2, 0 }, /* Sprite 6 image data register B */ { "SPR6DATB", 0xdff176, 2 }, /* Sprite 6 image data register B */
{ "SPR7POS", 0xdff178, 2, 0 }, /* Sprite 7 vert-horiz start pos data */ { "SPR7POS", 0xdff178, 2 }, /* Sprite 7 vert-horiz start pos data */
{ "SPR7CTL", 0xdff17A, 2, 0 }, /* Sprite 7 position and control data */ { "SPR7CTL", 0xdff17A, 2 }, /* Sprite 7 position and control data */
{ "SPR7DATA", 0xdff17C, 2, 0 }, /* Sprite 7 image data register A */ { "SPR7DATA", 0xdff17C, 2 }, /* Sprite 7 image data register A */
{ "SPR7DATB", 0xdff17E, 2, 0 }, /* Sprite 7 image data register B */ { "SPR7DATB", 0xdff17E, 2 }, /* Sprite 7 image data register B */
{ "COLOR00", 0xdff180, 2, 0 }, /* Color table 00 */ { "COLOR00", 0xdff180, 2 }, /* Color table 00 */
{ "COLOR01", 0xdff182, 2, 0 }, /* Color table 01 */ { "COLOR01", 0xdff182, 2 }, /* Color table 01 */
{ "COLOR02", 0xdff184, 2, 0 }, /* Color table 02 */ { "COLOR02", 0xdff184, 2 }, /* Color table 02 */
{ "COLOR03", 0xdff186, 2, 0 }, /* Color table 03 */ { "COLOR03", 0xdff186, 2 }, /* Color table 03 */
{ "COLOR04", 0xdff188, 2, 0 }, /* Color table 04 */ { "COLOR04", 0xdff188, 2 }, /* Color table 04 */
{ "COLOR05", 0xdff18A, 2, 0 }, /* Color table 05 */ { "COLOR05", 0xdff18A, 2 }, /* Color table 05 */
{ "COLOR06", 0xdff18C, 2, 0 }, /* Color table 06 */ { "COLOR06", 0xdff18C, 2 }, /* Color table 06 */
{ "COLOR07", 0xdff18E, 2, 0 }, /* Color table 07 */ { "COLOR07", 0xdff18E, 2 }, /* Color table 07 */
{ "COLOR08", 0xdff190, 2, 0 }, /* Color table 08 */ { "COLOR08", 0xdff190, 2 }, /* Color table 08 */
{ "COLOR09", 0xdff192, 2, 0 }, /* Color table 09 */ { "COLOR09", 0xdff192, 2 }, /* Color table 09 */
{ "COLOR10", 0xdff194, 2, 0 }, /* Color table 10 */ { "COLOR10", 0xdff194, 2 }, /* Color table 10 */
{ "COLOR11", 0xdff196, 2, 0 }, /* Color table 11 */ { "COLOR11", 0xdff196, 2 }, /* Color table 11 */
{ "COLOR12", 0xdff198, 2, 0 }, /* Color table 12 */ { "COLOR12", 0xdff198, 2 }, /* Color table 12 */
{ "COLOR13", 0xdff19A, 2, 0 }, /* Color table 13 */ { "COLOR13", 0xdff19A, 2 }, /* Color table 13 */
{ "COLOR14", 0xdff19C, 2, 0 }, /* Color table 14 */ { "COLOR14", 0xdff19C, 2 }, /* Color table 14 */
{ "COLOR15", 0xdff19E, 2, 0 }, /* Color table 15 */ { "COLOR15", 0xdff19E, 2 }, /* Color table 15 */
{ "COLOR16", 0xdff1A0, 2, 0 }, /* Color table 16 */ { "COLOR16", 0xdff1A0, 2 }, /* Color table 16 */
{ "COLOR17", 0xdff1A2, 2, 0 }, /* Color table 17 */ { "COLOR17", 0xdff1A2, 2 }, /* Color table 17 */
{ "COLOR18", 0xdff1A4, 2, 0 }, /* Color table 18 */ { "COLOR18", 0xdff1A4, 2 }, /* Color table 18 */
{ "COLOR19", 0xdff1A6, 2, 0 }, /* Color table 19 */ { "COLOR19", 0xdff1A6, 2 }, /* Color table 19 */
{ "COLOR20", 0xdff1A8, 2, 0 }, /* Color table 20 */ { "COLOR20", 0xdff1A8, 2 }, /* Color table 20 */
{ "COLOR21", 0xdff1AA, 2, 0 }, /* Color table 21 */ { "COLOR21", 0xdff1AA, 2 }, /* Color table 21 */
{ "COLOR22", 0xdff1AC, 2, 0 }, /* Color table 22 */ { "COLOR22", 0xdff1AC, 2 }, /* Color table 22 */
{ "COLOR23", 0xdff1AE, 2, 0 }, /* Color table 23 */ { "COLOR23", 0xdff1AE, 2 }, /* Color table 23 */
{ "COLOR24", 0xdff1B0, 2, 0 }, /* Color table 24 */ { "COLOR24", 0xdff1B0, 2 }, /* Color table 24 */
{ "COLOR25", 0xdff1B2, 2, 0 }, /* Color table 25 */ { "COLOR25", 0xdff1B2, 2 }, /* Color table 25 */
{ "COLOR26", 0xdff1B4, 2, 0 }, /* Color table 26 */ { "COLOR26", 0xdff1B4, 2 }, /* Color table 26 */
{ "COLOR27", 0xdff1B6, 2, 0 }, /* Color table 27 */ { "COLOR27", 0xdff1B6, 2 }, /* Color table 27 */
{ "COLOR28", 0xdff1B8, 2, 0 }, /* Color table 28 */ { "COLOR28", 0xdff1B8, 2 }, /* Color table 28 */
{ "COLOR29", 0xdff1BA, 2, 0 }, /* Color table 29 */ { "COLOR29", 0xdff1BA, 2 }, /* Color table 29 */
{ "COLOR30", 0xdff1BC, 2, 0 }, /* Color table 30 */ { "COLOR30", 0xdff1BC, 2 }, /* Color table 30 */
{ "COLOR31", 0xdff1BE, 2, 0 }, /* Color table 31 */ { "COLOR31", 0xdff1BE, 2 }, /* Color table 31 */
{ "HTOTAL", 0xdff1C0, 2, 4 }, /* Highest number count in horiz line (VARBEAMEN = 1) */ { "HTOTAL", 0xdff1C0, 2|4 }, /* Highest number count in horiz line (VARBEAMEN = 1) */
{ "HSSTOP", 0xdff1C2, 2, 4 }, /* Horiz line pos for HSYNC stop */ { "HSSTOP", 0xdff1C2, 2|4 }, /* Horiz line pos for HSYNC stop */
{ "HBSTRT", 0xdff1C4, 2, 4 }, /* Horiz line pos for HBLANK start */ { "HBSTRT", 0xdff1C4, 2|4 }, /* Horiz line pos for HBLANK start */
{ "HBSTOP", 0xdff1C6, 2, 4 }, /* Horiz line pos for HBLANK stop */ { "HBSTOP", 0xdff1C6, 2|4 }, /* Horiz line pos for HBLANK stop */
{ "VTOTAL", 0xdff1C8, 2, 4 }, /* Highest numbered vertical line (VARBEAMEN = 1) */ { "VTOTAL", 0xdff1C8, 2|4 }, /* Highest numbered vertical line (VARBEAMEN = 1) */
{ "VSSTOP", 0xdff1CA, 2, 4 }, /* Vert line for VBLANK start */ { "VSSTOP", 0xdff1CA, 2|4 }, /* Vert line for VBLANK start */
{ "VBSTRT", 0xdff1CC, 2, 4 }, /* Vert line for VBLANK start */ { "VBSTRT", 0xdff1CC, 2|4 }, /* Vert line for VBLANK start */
{ "VBSTOP", 0xdff1CE, 2, 4 }, /* Vert line for VBLANK stop */ { "VBSTOP", 0xdff1CE, 2|4 }, /* Vert line for VBLANK stop */
#if 0 #if 0
{ "SPRHSTRT", 0xdff1D0 }, /* UHRES sprite vertical start */ { "SPRHSTRT", 0xdff1D0 }, /* UHRES sprite vertical start */
{ "SPRHSTOP", 0xdff1D2 }, /* UHRES sprite vertical stop */ { "SPRHSTOP", 0xdff1D2 }, /* UHRES sprite vertical stop */
...@@ -376,11 +376,11 @@ const struct customData custd[] = ...@@ -376,11 +376,11 @@ const struct customData custd[] =
{ "HHPOSW", 0xdff1D8 }, /* DUAL mode hires H beam counter write */ { "HHPOSW", 0xdff1D8 }, /* DUAL mode hires H beam counter write */
{ "HHPOSR", 0xdff1DA }, /* DUAL mode hires H beam counter read */ { "HHPOSR", 0xdff1DA }, /* DUAL mode hires H beam counter read */
#endif #endif
{ "BEAMCON0", 0xdff1DC, 2, 4 }, /* Beam counter control register (SHRES,UHRES,PAL) */ { "BEAMCON0", 0xdff1DC, 2|4 }, /* Beam counter control register (SHRES,UHRES,PAL) */
{ "HSSTRT", 0xdff1DE, 2, 4 }, /* Horizontal sync start (VARHSY) */ { "HSSTRT", 0xdff1DE, 2|4 }, /* Horizontal sync start (VARHSY) */
{ "VSSTRT", 0xdff1E0, 2, 4 }, /* Vertical sync start (VARVSY) */ { "VSSTRT", 0xdff1E0, 2|4 }, /* Vertical sync start (VARVSY) */
{ "HCENTER", 0xdff1E2, 2, 4 }, /* Horizontal pos for vsync on interlace */ { "HCENTER", 0xdff1E2, 2|4 }, /* Horizontal pos for vsync on interlace */
{ "DIWHIGH", 0xdff1E4, 2, 4 }, /* Display window upper bits for start/stop */ { "DIWHIGH", 0xdff1E4, 2|4 }, /* Display window upper bits for start/stop */
#if 0 #if 0
{ "BPLHMOD", 0xdff1E6 }, /* UHRES bit plane modulo */ { "BPLHMOD", 0xdff1E6 }, /* UHRES bit plane modulo */
{ "SPRHPTH", 0xdff1E8 }, /* UHRES sprite pointer (high 5 bits) */ { "SPRHPTH", 0xdff1E8 }, /* UHRES sprite pointer (high 5 bits) */
...@@ -394,11 +394,10 @@ const struct customData custd[] = ...@@ -394,11 +394,10 @@ const struct customData custd[] =
{ "RESERVED", 0xdff1F8 }, /* Reserved (forever i guess!) */ { "RESERVED", 0xdff1F8 }, /* Reserved (forever i guess!) */
{ "RESERVED", 0xdff1Fa }, /* Reserved (forever i guess!) */ { "RESERVED", 0xdff1Fa }, /* Reserved (forever i guess!) */
#endif #endif
{ "FMODE", 0xdff1FC, 2, 8 }, /* Fetch mode register */ { "FMODE", 0xdff1FC, 2|8 }, /* Fetch mode register */
#if 0
{ "NO-OP(NULL)", 0xdff1FE }, /* Can also indicate last 2 or 3 refresh { "NO-OP(NULL)", 0xdff1FE }, /* Can also indicate last 2 or 3 refresh
cycles or the restart of the COPPER after lockup.*/ cycles or the restart of the COPPER after lockup.*/
#endif { NULL }
}; };
#endif #endif
...@@ -37,6 +37,7 @@ struct strlist { ...@@ -37,6 +37,7 @@ struct strlist {
#define MAX_INPUT_SETTINGS 4 #define MAX_INPUT_SETTINGS 4
#define GAMEPORT_INPUT_SETTINGS 3 // last slot is for gameport panel mappings #define GAMEPORT_INPUT_SETTINGS 3 // last slot is for gameport panel mappings
#define MAX_INPUT_SUB_EVENT 4 #define MAX_INPUT_SUB_EVENT 4
#define MAX_INPUT_SUB_EVENT_ALL 5
#define SPARE_SUB_EVENT 4 #define SPARE_SUB_EVENT 4
// this better be here than in sound.h -mustafa. // this better be here than in sound.h -mustafa.
...@@ -50,10 +51,10 @@ struct strlist { ...@@ -50,10 +51,10 @@ struct strlist {
struct uae_input_device { struct uae_input_device {
TCHAR *name; TCHAR *name;
TCHAR *configname; TCHAR *configname;
uae_s16 eventid[MAX_INPUT_DEVICE_EVENTS][MAX_INPUT_SUB_EVENT + 1]; uae_s16 eventid[MAX_INPUT_DEVICE_EVENTS][MAX_INPUT_SUB_EVENT_ALL];
TCHAR *custom[MAX_INPUT_DEVICE_EVENTS][MAX_INPUT_SUB_EVENT + 1]; TCHAR *custom[MAX_INPUT_DEVICE_EVENTS][MAX_INPUT_SUB_EVENT_ALL];
uae_u16 flags[MAX_INPUT_DEVICE_EVENTS][MAX_INPUT_SUB_EVENT + 1]; uae_u16 flags[MAX_INPUT_DEVICE_EVENTS][MAX_INPUT_SUB_EVENT_ALL];
uae_s8 port[MAX_INPUT_DEVICE_EVENTS][MAX_INPUT_SUB_EVENT + 1]; uae_s8 port[MAX_INPUT_DEVICE_EVENTS][MAX_INPUT_SUB_EVENT_ALL];
uae_s16 extra[MAX_INPUT_DEVICE_EVENTS]; uae_s16 extra[MAX_INPUT_DEVICE_EVENTS];
uae_s8 enabled; uae_s8 enabled;
}; };
...@@ -152,6 +153,7 @@ struct uae_prefs { ...@@ -152,6 +153,7 @@ struct uae_prefs {
int config_version; int config_version;
TCHAR config_hardware_path[MAX_DPATH]; TCHAR config_hardware_path[MAX_DPATH];
TCHAR config_host_path[MAX_DPATH]; TCHAR config_host_path[MAX_DPATH];
TCHAR config_window_title[256];
bool illegal_mem; bool illegal_mem;
bool use_serial; bool use_serial;
......
...@@ -350,7 +350,7 @@ static void kbrlabel (TCHAR *s) ...@@ -350,7 +350,7 @@ static void kbrlabel (TCHAR *s)
} }
} }
static void write_config2 (struct zfile *f, int idnum, int i, int offset, TCHAR *tmp1, struct uae_input_device *id) static void write_config2 (struct zfile *f, int idnum, int i, int offset, const TCHAR *extra, struct uae_input_device *id)
{ {
TCHAR tmp2[200], tmp3[200], *p; TCHAR tmp2[200], tmp3[200], *p;
int evt, got, j, k; int evt, got, j, k;
...@@ -360,6 +360,7 @@ static void write_config2 (struct zfile *f, int idnum, int i, int offset, TCHAR ...@@ -360,6 +360,7 @@ static void write_config2 (struct zfile *f, int idnum, int i, int offset, TCHAR
int *slotorder; int *slotorder;
int io = i + offset; int io = i + offset;
tmp2[0] = 0;
p = tmp2; p = tmp2;
got = 0; got = 0;
...@@ -404,7 +405,7 @@ static void write_config2 (struct zfile *f, int idnum, int i, int offset, TCHAR ...@@ -404,7 +405,7 @@ static void write_config2 (struct zfile *f, int idnum, int i, int offset, TCHAR
} }
} }
if (p > tmp2) { if (p > tmp2) {
_stprintf (tmp3, "input.%d.%s%d", idnum + 1, tmp1, i); _stprintf (tmp3, "input.%d.%s%d", idnum + 1, extra, i);
cfgfile_write_str (f, tmp3, tmp2); cfgfile_write_str (f, tmp3, tmp2);
} }
} }
...@@ -460,8 +461,8 @@ static void write_kbr_config (struct zfile *f, int idnum, int devnum, struct uae ...@@ -460,8 +461,8 @@ static void write_kbr_config (struct zfile *f, int idnum, int devnum, struct uae
i++; i++;
continue; continue;
} }
tmp2[0] = 0;
p = tmp2; p = tmp2;
p[0] = 0;
for (j = 0; j < MAX_INPUT_SUB_EVENT; j++) { for (j = 0; j < MAX_INPUT_SUB_EVENT; j++) {
TCHAR *custom = kbr->custom[i][slotorder[j]]; TCHAR *custom = kbr->custom[i][slotorder[j]];
evt = kbr->eventid[i][slotorder[j]]; evt = kbr->eventid[i][slotorder[j]];
...@@ -583,7 +584,7 @@ static void reset_inputdevice_settings (struct uae_input_device *uid) ...@@ -583,7 +584,7 @@ static void reset_inputdevice_settings (struct uae_input_device *uid)
{ {
unsigned int l,i; unsigned int l,i;
for (l = 0; l < MAX_INPUT_DEVICE_EVENTS; l++) { for (l = 0; l < MAX_INPUT_DEVICE_EVENTS; l++) {
for (i = 0; i < MAX_INPUT_SUB_EVENT; i++) { for (i = 0; i < MAX_INPUT_SUB_EVENT_ALL; i++) {
uid->eventid[l][i] = 0; uid->eventid[l][i] = 0;
uid->flags[l][i] = 0; uid->flags[l][i] = 0;
xfree (uid->custom[l][i]); xfree (uid->custom[l][i]);
...@@ -665,7 +666,7 @@ static void clear_id (struct uae_input_device *id) ...@@ -665,7 +666,7 @@ static void clear_id (struct uae_input_device *id)
#ifndef _DEBUG #ifndef _DEBUG
int i, j; int i, j;
for (i = 0; i < MAX_INPUT_DEVICE_EVENTS; i++) { for (i = 0; i < MAX_INPUT_DEVICE_EVENTS; i++) {
for (j = 0; j < MAX_INPUT_SUB_EVENT; j++) for (j = 0; j < MAX_INPUT_SUB_EVENT_ALL; j++)
xfree (id->custom[i][j]); xfree (id->custom[i][j]);
} }
#endif #endif
...@@ -5856,7 +5857,6 @@ uae_u8 *save_inputstate (int *len, uae_u8 *dstptr) ...@@ -5856,7 +5857,6 @@ uae_u8 *save_inputstate (int *len, uae_u8 *dstptr)
uae_u8 *restore_inputstate (uae_u8 *src) uae_u8 *restore_inputstate (uae_u8 *src)
{ {
unsigned int i, j; unsigned int i, j;
for (i = 0; i < MAX_JPORTS; i++) { for (i = 0; i < MAX_JPORTS; i++) {
joydir[i] = restore_u16 (); joydir[i] = restore_u16 ();
joybutton[i] = restore_u16 (); joybutton[i] = restore_u16 ();
......
...@@ -404,6 +404,13 @@ void fixup_prefs (struct uae_prefs *p) ...@@ -404,6 +404,13 @@ void fixup_prefs (struct uae_prefs *p)
p->cs_ramseyrev = 0x0f; p->cs_ramseyrev = 0x0f;
p->cs_mbdmac = 0; p->cs_mbdmac = 0;
} }
} else if (p->cs_compatible == 0) {
if (p->cs_ide == IDE_A4000) {
if (p->cs_fatgaryrev < 0)
p->cs_fatgaryrev = 0;
if (p->cs_ramseyrev < 0)
p->cs_ramseyrev = 0x0f;
}
} }
fixup_prefs_dimensions (p); fixup_prefs_dimensions (p);
......
...@@ -265,7 +265,6 @@ static bool check_trace (void) ...@@ -265,7 +265,6 @@ static bool check_trace (void)
static bool get_trace (uaecptr addr, int accessmode, int size, uae_u32 *data) static bool get_trace (uaecptr addr, int accessmode, int size, uae_u32 *data)
{ {
unsigned int i; unsigned int i;
int mode = accessmode | (size << 4); int mode = accessmode | (size << 4);
for (i = 0; i < cputrace.memoryoffset; i++) { for (i = 0; i < cputrace.memoryoffset; i++) {
struct cputracememory *ctm = &cputrace.ctm[i]; struct cputracememory *ctm = &cputrace.ctm[i];
......
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