puae 2.3.1

src/audio.c

@@ -237,7 +237,7 @@ void audio_sampleripper (int mode)
 static void do_samplerip (struct audio_channel_data *adp)
 {
 	struct ripped_sample *rs = ripped_samples, *prev;
-	int len = adp->len * 2;
+	int len = adp->wlen * 2;
 	uae_u8 *smp = chipmem_xlate_indirect (adp->pt);
 	int cnt = 0, i;
 
@@ -1895,10 +1895,12 @@ void AUDxLCL (int nr, uae_u16 v)
 void AUDxPER (int nr, uae_u16 v)
 {
 	struct audio_channel_data *cdp = audio_channel + nr;
-	unsigned long per = v * CYCLE_UNIT;
+	unsigned long per;
 
 	audio_activate ();
 	update_audio ();
+
+	per = v * CYCLE_UNIT;
 	if (per == 0)
 		per = PERIOD_MAX - 1;
 

src/custom.c

@@ -3304,7 +3304,8 @@ static void DMACON (int hpos, uae_u16 v)
 static void MISC_handler (void)
 {
 	static bool dorecheck;
-	int i, recheck;
+	bool recheck;
+	int i;
 	evt mintime;
 	evt ct = get_cycles ();
 	static int recursive;
@@ -3315,17 +3316,17 @@ static void MISC_handler (void)
 	}
 	recursive++;
 	eventtab[ev_misc].active = 0;
-	recheck = 1;
+	recheck = true;
 	while (recheck) {
-		recheck = 0;
+		recheck = false;
 		mintime = ~0L;
 		for (i = 0; i < ev2_max; i++) {
 			if (eventtab2[i].active) {
 				if (eventtab2[i].evtime == ct) {
-					eventtab2[i].active = 0;
+					eventtab2[i].active = false;
 					eventtab2[i].handler (eventtab2[i].data);
 					if (dorecheck || eventtab2[i].active) {
-						recheck = 1;
+						recheck = true;
 						dorecheck = false;
 					}
 				} else {
@@ -3337,7 +3338,7 @@ static void MISC_handler (void)
 		}
 	}
 	if (mintime != ~0L) {
-		eventtab[ev_misc].active = 1;
+		eventtab[ev_misc].active = true;
 		eventtab[ev_misc].oldcycles = ct;
 		eventtab[ev_misc].evtime = ct + mintime;
 		events_schedule ();
@@ -3370,7 +3371,7 @@ STATIC_INLINE void event2_newevent_xx (int no, evt t, uae_u32 data, evfunc2 func
 		}
 		next = no;
 	}
-	eventtab2[no].active = 1;
+	eventtab2[no].active = true;
 	eventtab2[no].evtime = et;
 	eventtab2[no].handler = func;
 	eventtab2[no].data = data;
@@ -3536,11 +3537,10 @@ static void ADKCON (int hpos, uae_u16 v)
 {
 	if (currprefs.produce_sound > 0)
 		update_audio ();
-
+	DISK_update (hpos);
 	DISK_update_adkcon (hpos, v);
 	setclr (&adkcon, v);
 	audio_update_adkmasks ();
-	DISK_update (hpos);
 	if ((v >> 11) & 1)
 		serial_uartbreak ((adkcon >> 11) & 1);
 }
@@ -5394,7 +5394,6 @@ static void dmal_func2 (uae_u32 v)
 
 static void events_dmal (int hp)
 {
-	int i;
 	if (!dmal)
 		return;
 	if (currprefs.cpu_cycle_exact) {
@@ -5718,7 +5717,7 @@ static void hsync_handler_post (bool isvsync)
 		if (vpos > last_planes_vpos)
 			last_planes_vpos = vpos;
 		if (vpos >= minfirstline && first_planes_vpos == 0) {
-			first_planes_vpos = vpos;
+			first_planes_vpos = vpos > minfirstline ? vpos - 1 : vpos;
 		} else if (vpos == current_maxvpos () - 1) {
 			last_planes_vpos = vpos - 1;
 		}
@@ -6177,34 +6176,33 @@ STATIC_INLINE uae_u32 REGPARAM2 custom_wget_1 (int hpos, uaecptr addr, int noput
 		if (!noput) {
 			int r;
 			uae_u16 old = last_custom_value1;
-			uae_u16 l = currprefs.cpu_compatible && currprefs.cpu_model == 68000 ? regs.irc : 0xffff;//last_custom_value;
+			uae_u16 l = currprefs.cpu_compatible && currprefs.cpu_model == 68000 ? regs.irc : 0xffff;
 			decide_line (hpos);
 			decide_fetch (hpos);
 			decide_blitter (hpos);
 			debug_wputpeek (0xdff000 + addr, l);
 			r = custom_wput_1 (hpos, addr, l, 1);
-			if (currprefs.chipset_mask & CSMASK_AGA) {
+			if (r) { // register don't exist
+				if (currprefs.chipset_mask & CSMASK_ECS_AGNUS) {
 					v = l;
-				last_custom_value1 = 0xffff;
-			} else if (currprefs.chipset_mask & CSMASK_ECS_AGNUS) {
-				v = old;
 				} else {
 					if ((addr & 0x1fe) == 0) {
 						if (is_cycle_ce ())
-						v = old;
+							v = last_custom_value1;
 						else
 							v = l;
-				} else {
-					v = old;
 					}
 				}
+			} else {
+				v = 0xffff;
+			}
 #if CUSTOM_DEBUG > 0
 			write_log ("%08X read = %04X. Value written=%04X PC=%08x\n", 0xdff000 | addr, v, l, M68K_GETPC);
 #endif
-
-		}
 			return v;
 		}
+	}
+	last_custom_value1 = v;
 	return v;
 }
 
@@ -6259,6 +6257,8 @@ uae_u32 REGPARAM2 custom_lget (uaecptr addr)
 }
 static int REGPARAM2 custom_wput_1 (int hpos, uaecptr addr, uae_u32 value, int noget)
 {
+	if (!noget)
+		last_custom_value1 = value;
 	addr &= 0x1FE;
 	value &= 0xffff;
 #ifdef ACTION_REPLAY

src/filesys.asm

@@ -232,7 +232,6 @@ FSIN_none:
 ;FSIN_scandone:
 ;	jsr -$007e(a6) ; Enable
 
-
 filesys_dev_storeinfo
 	moveq #3,d4 ; MEMF_CHIP | MEMF_PUBLIC
 	cmp.w #36,20(a6)
@@ -242,6 +241,7 @@ FSIN_ksold
 
 	; add >2MB-6MB chip RAM to memory list
 	lea $210000,a1
+	; do not add if RAM detected already
 	jsr -$216(a6) ; TypeOfMem
 	tst.l d0
 	bne.s FSIN_chip_done

src/gayle.c

@@ -1284,19 +1284,19 @@ static void mbres_write (uaecptr addr, uae_u32 val, int size)
 
 	if (MBRES_LOG > 0)
 		write_log ("MBRES_WRITE %08X=%08X (%d) PC=%08X S=%d\n", addr, val, size, M68K_GETPC, regs.s);
-	if (regs.s) { /* CPU FC = supervisor only */
+	if (1 || regs.s) { /* CPU FC = supervisor only */
+		uae_u32 addr2 = addr & 3;
+		uae_u32 addr64 = (addr >> 6) & 3;
 		if (addr == 0x1002)
 			garyidoffset = -1;
-		if (addr == 0x03)
+		if (addr64 == 0 && addr2 == 0x03)
 			ramsey_config = val;
-		if (addr == 0x02)
+		if (addr2 == 0x02)
 			gary_coldboot = (val & 0x80) ? 1 : 0;
-		if (addr == 0x01)
+		if (addr2 == 0x01)
 			gary_toenb = (val & 0x80) ? 1 : 0;
-		if (addr == 0x00)
+		if (addr2 == 0x00)
 			gary_timeout = (val & 0x80) ? 1 : 0;
-	} else {
-		custom_bank.wput (addr, val);
 	}
 }
 
@@ -1305,35 +1305,47 @@ static uae_u32 mbres_read (uaecptr addr, int size)
 	uae_u32 v = 0;
 	addr &= 0xffff;
 
-	if (regs.s) { /* CPU FC = supervisor only */
+	if (1 || regs.s) { /* CPU FC = supervisor only (only newest ramsey/gary? never implemented?) */
+		uae_u32 addr2 = addr & 3;
+		uae_u32 addr64 = (addr >> 6) & 3;
 		/* Gary ID (I don't think this exists in real chips..) */
 		if (addr == 0x1002 && currprefs.cs_fatgaryrev >= 0) {
 			garyidoffset++;
 			garyidoffset &= 7;
 			v = (currprefs.cs_fatgaryrev << garyidoffset) & 0x80;
 		}
-		if (addr == 0x43) { /* RAMSEY revision */
+		for (;;) {
+			if (addr64 == 1 && addr2 == 0x03) { /* RAMSEY revision */
 				if (currprefs.cs_ramseyrev >= 0)
 					v = currprefs.cs_ramseyrev;
+				break;
 			}
-		if (addr == 0x03) { /* RAMSEY config */
+			if (addr64 == 0 && addr2 == 0x03) { /* RAMSEY config */
 				if (currprefs.cs_ramseyrev >= 0)
 					v = ramsey_config;
+				break;
 			}
-		if (addr == 0x02) { /* coldreboot flag */
+			if (addr2 == 0x03) {
+				v = 0xff;
+				break;
+			}
+			if (addr2 == 0x02) { /* coldreboot flag */
 				if (currprefs.cs_fatgaryrev >= 0)
 					v = gary_coldboot ? 0x80 : 0x00;
 			}
-		if (addr == 0x01) { /* toenb flag */
+			if (addr2 == 0x01) { /* toenb flag */
 				if (currprefs.cs_fatgaryrev >= 0)
 					v = gary_toenb ? 0x80 : 0x00;
 			}
-		if (addr == 0x00) { /* timeout flag */
+			if (addr2 == 0x00) { /* timeout flag */
 				if (currprefs.cs_fatgaryrev >= 0)
 					v = gary_timeout ? 0x80 : 0x00;
 			}
+			v |= 0x7f;
+			break;
+		}
 	} else {
-		v = custom_bank.wget (addr);
+		v = 0xff;
 	}
 	if (MBRES_LOG > 0)
 		write_log ("MBRES_READ %08X=%08X (%d) PC=%08X S=%d\n", addr, v, size, M68K_GETPC, regs.s);

src/gencpu.c

@@ -58,6 +58,7 @@ static int optimized_flags;
 #define GF_PREFETCH 16
 #define GF_FC 32
 #define GF_MOVE 64
+#define GF_IR2IRC 128
 
 /* For the current opcode, the next lower level that will have different code.
  * Initialized to -1 for each opcode. If it remains unchanged, indicates we
@@ -128,6 +129,7 @@ static int need_endlabel;
 static int n_braces, limit_braces;
 static int m68k_pc_offset;
 static int insn_n_cycles, insn_n_cycles020;
+static int ir2irc;
 
 static void fpulimit (void)
 {
@@ -346,11 +348,16 @@ static const char *gen_nextibyte (int flags)
 	return buffer;
 }
 
-static void irc2ir (void)
+static void irc2ir (unsigned int dozero)
 {
 	if (!using_prefetch)
 		return;
+	if (ir2irc)
+		return;
+	ir2irc = 1;
 	printf ("\tregs.ir = regs.irc;\n");
+	if (dozero)
+		printf ("\tregs.irc = 0;\n");
 	if (using_ce)
 		printf ("\tipl_fetch ();\n");
 }
@@ -363,6 +370,7 @@ static void fill_prefetch_2 (void)
 		return;
 	printf ("\t%s (%d);\n", prefetch_word, m68k_pc_offset + 2);
 	did_prefetch = 1;
+	ir2irc = 0;
 	count_read++;
 	insn_n_cycles += 4;
 }
@@ -373,6 +381,7 @@ static void fill_prefetch_1 (int o)
 		return;
 	printf ("\t%s (%d);\n", prefetch_word, o);
 	did_prefetch = 1;
+	ir2irc = 0;
 	count_read++;
 	insn_n_cycles += 4;
 }
@@ -380,7 +389,7 @@ static void fill_prefetch_1 (int o)
 static void fill_prefetch_full (void)
 {
 	fill_prefetch_1 (0);
-	irc2ir ();
+	irc2ir (0);
 	fill_prefetch_1 (2);
 }
 
@@ -390,6 +399,7 @@ static void fill_prefetch_0 (void)
 		return;
 	printf ("\t%s (0);\n", prefetch_word);
 	did_prefetch = 1;
+	ir2irc = 0;
 	count_read++;
 	insn_n_cycles += 4;
 }
@@ -406,7 +416,7 @@ static void dummy_prefetch (void)
 
 static void fill_prefetch_next_1 (void)
 {
-	irc2ir ();
+	irc2ir (0);
 	fill_prefetch_1 (m68k_pc_offset + 2);
 }
 
@@ -711,6 +721,8 @@ static void genamode2 (amodes mode, char *reg, wordsizes size, char *name, int g
 
 	if (flags & GF_PREFETCH)
 		fill_prefetch_next ();
+	else if (flags & GF_IR2IRC)
+		irc2ir (1);
 
 	if (getv == 1) {
 		start_brace ();
@@ -1439,6 +1451,7 @@ static void gen_opcode (unsigned long int opcode)
 	struct instr *curi = table68k + opcode;
 
 	insn_n_cycles = using_prefetch ? 0 : 4;
+	ir2irc = 0;
 
 	prefetch_long = NULL;
 	srcli = NULL;
@@ -1885,7 +1898,7 @@ static void gen_opcode (unsigned long int opcode)
 		break;
 	case i_BTST:
 		genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
-		genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0);
+		genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_IR2IRC);
 		fill_prefetch_next ();
 		bsetcycles (curi);
 		printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n");
@@ -1894,7 +1907,7 @@ static void gen_opcode (unsigned long int opcode)
 	case i_BCLR:
 	case i_BSET:
 		genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
-		genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0);
+		genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_IR2IRC);
 		fill_prefetch_next ();
 		bsetcycles (curi);
 		// bclr needs 1 extra cycle
@@ -2374,7 +2387,7 @@ static void gen_opcode (unsigned long int opcode)
 				printf ("\t\tgoto %s;\n", endlabelstr);
 				printf ("\t}\n");
 				sync_m68k_pc ();
-				irc2ir ();
+				irc2ir (0);
 				fill_prefetch_2 ();
 				printf ("\tgoto %s;\n", endlabelstr);
 				need_endlabel = 1;
@@ -2409,7 +2422,7 @@ static void gen_opcode (unsigned long int opcode)
 		sync_m68k_pc ();
 		if (curi->size == sz_byte) {
 			addcycles000 (2);
-			irc2ir ();
+			irc2ir (0);
 			fill_prefetch_2 ();
 		} else if (curi->size == sz_word) {
 			addcycles000 (2);
@@ -2461,7 +2474,7 @@ static void gen_opcode (unsigned long int opcode)
 			printf ("\t\t\t}\n");
 			need_endlabel = 1;
 		}
-		irc2ir ();
+		irc2ir (0);
 		fill_prefetch_1 (2);
 		returncycles ("\t\t\t", 12);
 		if (using_ce)
@@ -3896,7 +3909,7 @@ static void generate_cpu (int id, int mode)
 
 int main (int argc, char **argv)
 {
-	int i;
+	unsigned int i;
 
 	if (argc > 1) {
 		if (strcasecmp (argv[1], "--optimized-flags") == 0)

src/gui-cocoa/cocoaui.m

@@ -159,7 +159,7 @@ static BOOL wasFullscreen = NO; // used by ensureNotFullscreen() and restoreFull
             nil]; // Note: Use lowercase for these
 
 		KickRomTypes =[[NSArray alloc] initWithObjects:@"rom", @"roz"];
-		FlashRamTypes =[[NSArray alloc] initWithObjects:@"ram", @"raz"];
+		FlashRamTypes =[[NSArray alloc] initWithObjects:@"nvr"];
 		CartridgeTypes =[[NSArray alloc] initWithObjects:@"cart", @"rom", @"roz"];
 	}
 

src/include/events.h

@@ -53,14 +53,14 @@ typedef unsigned long int evt;
 
 struct ev
 {
-    int active;
+    bool active;
     evt evtime, oldcycles;
     evfunc handler;
 };
 
 struct ev2
 {
-    int active;
+    bool active;
     evt evtime;
     uae_u32 data;
     evfunc2 handler;

src/memory.c

@@ -2076,7 +2076,6 @@ uae_u8 *mapped_malloc (size_t s, const TCHAR *file)
 	if (id == -1) {
 		// Failed to allocate new shared mem segment, so turn
 		// off direct memory access and fall back on regular malloc()
-		static int recurse;
 		uae_u8 *p;
 		nocanbang ();
 		if (recurse)
@@ -2193,7 +2192,7 @@ static void allocate_memory (void)
 		bogomemory_allocated = 0;
 
 		allocated_bogomem = currprefs.bogomem_size;
-		if (allocated_bogomem == 0x180000)
+		if (allocated_bogomem >= 0x180000)
 			allocated_bogomem = 0x200000;
 		bogomem_mask = allocated_bogomem - 1;
 
@@ -2537,7 +2536,7 @@ void memory_reset (void)
 		int t = currprefs.bogomem_size >> 16;
 		if (t > 0x1C)
 			t = 0x1C;
-		if (t > 0x10 && ((currprefs.chipset_mask & CSMASK_AGA) || currprefs.cpu_model >= 68020))
+		if (t > 0x10 && ((currprefs.chipset_mask & CSMASK_AGA) || (currprefs.cpu_model >= 68020 && !currprefs.address_space_24)))
 			t = 0x10;
 		map_banks (&bogomem_bank, 0xC0, t, 0);
 	}

src/newcpu.c

@@ -3180,8 +3180,6 @@ STATIC_INLINE int do_specialties (int cycles)
 			hrtmon_breakenter ();
 		if (hrtmon_flag == ACTION_REPLAY_ACTIVATE)
 			hrtmon_enter ();
-		if (!(regs.spcflags & ~SPCFLAG_ACTION_REPLAY))
-			return 0;
 	}
 #endif
 	if ((regs.spcflags & SPCFLAG_ACTION_REPLAY) && action_replay_flag != ACTION_REPLAY_INACTIVE) {